PROGRAM NO.7
OBJECT:Write a program to convert the string data to its two’s complement form.
INSTRUMENT REQUIRED: 8086 Microprocessor Trainer Kit.
PROGRAM:
| MEMORY LOCATION | MACHINE CODE | OPCODE | OPERAND |
| 0200 | BE 00 03 | MOV | SI,0300H |
| 0203 | BF 00 04 | MOV | DI,0400H |
| 0206 | B9 0A 00 | MOV | CX,000AH |
| 0209 | AC | LODSB | |
| 020A | F6 D8 | NEG | AL |
| 020C | AA | STOSB | |
| 020D | E0 FA | LOOP NZ | 0209 |
| 020F | F4 | HLT |
DESCRIPTION:
To solve the given objective we have taken TEN hexadecimal numbers in the memory locations of 0300H and 0309H and then individually taken their two’s complement and store the result in the memory location from 0400H to 0409H.
To solve the given objective we have taken the following steps:
- Move the source index register (SI) pointer to the location of the first number to be complemented.
- Move the destination index (DI) pointer to the location of the first memory location where the complemented number is to be stored.
- Increment the counter register CX to 10 as 10 numbers are to be complemented.
- Move the data to be complemented which is being pointed to by SI to the AL register and simultaneously increment the SI pointer to point to the next memory location using the LODSB.
- Now carry out the two’s complement operation using NEG AL instruction which two’s complements the data in the AL register and stores the result back into the AL register.
- Move the data which has been complemented and is presently stored in the AL register to the memory location being pointed to by DI and simultaneously increment the DI pointer to point to the next memory location using STOSB instruction.
- Repeat this operation using a LOOP instruction until each of the 10 numbers has been complemented and then Halt.
INPUT:
| MEMORY LOCATION | VALUE |
| 0300H | 01 |
| 0301H | 02 |
| 0302H | 03 |
| 0303H | 04 |
| 0304H | 05 |
| 0305H | 06 |
| 0306H | 07 |
| 0307H | 08 |
| 0308H | 09 |
| 0309H | 11 |
OUTPUT:
| MEMORY LOCATION | VALUE |
| 0400H | FF |
| 0401H | FE |
| 0402H | FD |
| 0403H | FC |
| 0404H | FB |
| 0405H | FA |
| 0406H | F9 |
| 0407H | F8 |
| 0408H | F7 |
| 0409H | EF |
RESULT: The string of data has been converted to its complement form and has been stored in the memory locations from 0400H to 0409H.
COMMENTS:
- NEG AL: This instruction obtains the two’s complement of the content of an 8-bit or 16-bit specified register (in this case AL) or memory location(s).
- LOOP NZ: The instruction LOOP NZ is used to repeat a sequence of instructions for the specified number of times or until the zero flag ZF becomes 1.
- STOSB: This instruction is used for storing 8-bit string data.
- LODSB: LODS instruction loads 8-bit or 16-bit data from memory location(s) addressed by SI register into AL or AX register. For byte loading LODSB instruction is used.
- HLT: This instruction stops program execution. The processor stops fetching and executing instructions.
FLOWCHART:
Most Important Question for Exam
1. The BIU contains FIFO register of size________bytes
6
2. The BIU prefetches the instruction for memory and store them in_________
Queue
3. The 1 MB byte of memory can be divide into __________segment
64 Kbyte
4. The push source copies a word from source to____________
Stack
5. LDs copies to consecutive words from to register and____________
DS
6. INC destination increments the content of destination by_____________
1
7. IMUL source is a signed_____________
Multiplication
8. __________destination invert each bit of destination
NOT
9. The JS is called as__________
Jump sign bit
10. Instruction providing both segment base and offset address are called__________
Far type
11. The conditional branch instruction specify____________for branching
Conditions
12. The Microprocessor determines whether specified condition exist or not by testing the_______
Conditional Flag
13. The LES copies to word from memory to register and_____________
ES
14. The ___________translate a byte from one code to another code
XLAT
15. The __________ contains and offset instead of actual address
IP
16. The 8086 fetches instruction one after another from_____________of memory
Code Segment
17. The BIU contains FIFO register of size 6 bytes called___________
Queue
18. The ___________is required to sysnchronize the internal operands in the processor CLK Signal
UR Signal
19. The pin of minimum mode AD0-AD15 has________address
20 bit
20. The pin of minimum mode AD0-AD15 has ______ data bus
20 bit
21. The address bits are sent out on lines through______________
A16-19
22. _________is used to write into memory
WR
23. The functionof pins from 24 to 31 depend of the mode in which_________is operating
8086
24. The RD, WR, M/IO is the heart of control for a_____________mode
Minimum
25. In a minimum mode there is a __________on the system bus
Single
26. If MN/MX is low the 8086 operates in_________mode
Both C & D
27. In max mode control bus signal so S1 and S2 are sent out in________________form
Encoded
28. The ________bus controller device decodes the signals to produce the control bus signal
External
29. A_________instruction at the end of interrupt service program takes the execution back to the interrupt program
Return
30. The main concerns of the_________are to define a flexible set of commands
Memory Interface
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